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Title
Engineering Prototype Report (EPR-00010)
15W, Universal Input, Single Output, Isolated Converter with TOP233Y (EP-10)
Recipients Application Author Date Battery Charger S. L. 14-November-2000
Abstract This document presents the specification, schematic & BOM, transformer calculation, test data, wave forms and EMI scan for a low cost, isolated converter for a battery charger application.
Power Integrations, Inc. 5245 Hellyer Avenue, San Jose, CA 95138 USA Tel: +1 408 414 9200 Fax: +1 408 414 9201 http://www.powerint.com
Engineering Prototype Report
Contents
1.0.Introduction................................................................................................................... 3 2.0 Power Supply Requirements Specification ................................................................... 3 3.0 Schematic..................................................................................................................... 4 4.0 Circuit Description ........................................................................................................5 5.0 Layout........................................................................................................................... 6 6.0 Bill of Materials ............................................................................................................. 7 7.0 Transformer .................................................................................................................. 8 7.1 Transformer drawing..................................................................................................... 8 7.2 Transformer spreadsheet ........................................................................................... 10 8.0 Performance Data ...................................................................................................... 12 8.1 Efficiency .................................................................................................................... 12 8.2 Regulation @ 25C ambient ........................................................................................ 13 8.3 Vout vs Iout................................................................................................................. 14 8.4 Temperature ............................................................................................................... 15 8.5 Waveforms ................................................................................................................. 17 8.6 Transient response..................................................................................................... 19 8.7 Conducted EMI Scans ................................................................................................ 20 8.8 Surge Voltages ........................................................................................................... 21 Revisions .......................................................................................................................... 22 Reader's Notes................................................................................................................. 23 PI world wide offices......................................................................................................... 24
EPR-00010
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Engineering Prototype Report
1.0 Introduction
This document presents the specification, schematic & BOM, transformer calculation, test data, wave forms and EMI scan for a low cost, isolated converter for a battery charger application. The converter is designed with TOP233Y(TOPSwitch-FX family) which brings the following benefits at no extra cost: -low component stress (soft start) -overload protection (auto-restart) -remote ON/OFF(computer interface; not used in the current design) -undervoltage and overvoltage protection (lockout -UVLO/OVLO) -over-temperature protection (hysteretic thermal shutdown) -energy saving (cycle skipping at low load) -EMI standard met with a low cost transformer, without shield winding and flux band (frequency jitter). -small size magnetics (132kHz switching frequency) -high efficiency (73% max. duty cycle and reduced-programmable current limit; not used in the current design)
2.0 Power Supply Requirements Specification
Description Input Normal Operating Input Voltage Abnormal Input Voltage* No load input power Output Output Voltage** Output Ripple Voltage Output Current Limit*** Power Output Continuous Output Power**** Power supply efficiency Environmental Temperature Safety Surge (differential, 2 ohm) Surge (common mode, 12 ohm) EMI-Conducted ***** Symbol Vin Vin Vout Vout ripple Iout Pout h Tamb Line-Line Line-Earth 0 1 2 Min 85 Typ Max 265 300 390 14 0.02 15 75 50 200 1.2 Units Vac Vac mW Vdc mV A W % C kV kV Comment 50/60Hz 50/60Hz Vin=265Vac, 60Hz Green LED indicator +/-5% Total Peak to Peak @ Full Load @ Full Load
IEC950/UL1950 IEC/UL 1000-4-5 Class 3 IEC/UL 1000-4-5 Class 3 CISPR22B
*Under voltage lockout: Power supply ON@ >70Vac, OFF@ <50Vac & loss of regulation (load dependent). Over voltage lockout: Power supply OFF @ >307Vac and back ON @ <290Vac. **Can be adjusted by changing the U3-1voltage (TL431). Battery charging voltage temperature compensation input available for external thermistor, NTC. (Floating/trickle charge: -3.9mV/degC; -20mV/degC and -30mV/degC are also common). ***Current limit set/programmable with a sense resistor. ****Power output derated if no heat sink is used at Tamb >40degC. ***** Output load not grounded
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Engineering Prototype Report
3.0 Schematic
R1 1M 1/4W D1 10mH/0.3A L1 D2 C1 33uF/450V + V R1 P6KE150
CY 1 2.2nF D7 UF5402 L2 3.3uH, 2.65 A C8 0.1uF/50 V
* OPTIONAL
J2- 1 +14VDC
1
10
C4 + 560uF/35V C5 +
F1
3.15A /250V CX1 0.1uF/X2
L J1- 1
R2 D5 910k 1/4W UF1005 2 5
R12 6.8k J2- 2
*
+
RT1 BT1
2
9 T1 EF-20 917uH
220uF/35V
THERMISTOR (NTC)
-
85-265 VAC
N J1- 2
M
D3 D4 1N4007
D
C
1
CONTROL
U1 TOP233Y D6 BA V2 0
C3
TP1
LED1 RTN J2- 3
*
4
R10 11.5K 1%
F
TP2
4
3
S
C2 47uF/10V
0.1uF/50 V
R3 6.8, 1/8W
5
U2 4 PC817A 3
R8 4.7 1/8W 1 2 C6 3 Q1 1 R7 470, 1/8W 4.7uF/35 V 3 +
R4 1 1/2W R5 1 1/2W
Title 14V /1 5W Charger Size A Date: Document Number EP- 10 Tuesday , Januar y 16, 2001 Sheet 1 of 1 Rev K
EPR-00010
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2
+
C7 0.1uF/50 V
R11 47.5K 1%
2 2N3904 R6 47, 1/8W
U3 1 TL431CLP R9 11.5K 1%
Engineering Prototype Report
4.0 Circuit Description
Specific features of this circuit (page 4) are: settable under voltage/over voltage protection, extended input voltage range(85-300Vac), settable battery charging current limit and charging voltage with correction for battery temperature. The AC input is rectified (D1-D4) and filtered (C1) to create a high voltage DC buss which is connected to T1-1. The primary current is modulated by U1 (TOP233Y) at 130kHz(U1-4 connected to U1-3). The secondary induced voltage(T-7,8) is rectified and filtered by D7, C4 with additional filtering provided by L2, C5 to give the 14Vdc output. The input fuse F1 is sized to resist the capacitor C1 charging current and isolates the line from a potential rectifier bridge (D1-D4) failure. Inductor L1 reduces the common mode noise and its leakage inductance together with CX1, the differential mode noise. The frequency jitter in TOP233Y (U1) allows the unit to meet worldwide conducted EMI standards using a common mode choke (L1) in combination with small value capacitors (CX1and CY1) and a proper PCB layout. The input filter is optimized when the EMI requirements are met with the lowest L1 (leak)*CX1 product value. Resistors R1+ R2 value (1.91Mohm) sets the under voltage (UVLO) and the overvoltage (OVLO) lock out voltage levels. The TOP233Y (U1-2) UV/OV threshold currents are 50/225uA, with 10uA hysteresis, going down, for 225uA (215uA threshold). UVLO= 50uA* 1.91Mohm= 95.5 Vdc (~75Vac), OVLO=225uA* 1.91Mohm= 430Vdc (~307Vac). On the rising input voltage, turn ON occurs at > 50uA (UVLO=95.5Vdc) and turn OFF at >225uA (OVLO=430Vdc). On the falling input voltage, turn ON occurs < 215uA (OVLO= 411Vdc) and turn OFF at <50uA and loss of regulation. The power supply turns off automatically when it loses the regulation at a given output load. VR1 and D5 form a clamp circuit that limits the turn-off voltage spike to a safe level on U1-5 (DRAIN) pin. There are two output control loops, both feeding back into the control pin (U1-1). The current input is supplied by the bias winding (T1-3,4) and modulated by the optocoupler (U2-3,4) phototransistor. The optocoupler (U2-1,2) photodiode current is controlled by: 1- The voltage control loop (U3, R7, R9,10, 11, RT1) in the constant voltage mode. 2- The current control loop (Q1, R4,5,6) in the constant current mode. 1.The 14Vdc output voltage is controlled by the sum of the voltage drops across the opto-coupler U2 and the voltage regulator U3. Resistor R8 (AC gain of the circuit) limits the current through U2, improving its response time. Resistor R7 sets the bias current for and C7 provides compensation for U3. Different output voltages can be selected by changing R9, R10, R11 and RT1 according to this formula: Vout= 2.5Vdc(1+(R11+(R10*RT1/R10+RT1))/R9), R10=11.5k 1% If RT1 is not used: Vout= 2.5Vdc(1+(R11+R10)/R9), R10 must be 11.5k/2 (install a 11.5k 1% in parallel with existing R10).
2.The output current is limited to Iout~ 1.2A=0.6V/0.5ohm(Q1 Vce(sat)/R4, R5 parallel resistance). The accuracy of Iout is limited by the Vce variation with the temperature and the precision of the current shunt R4, R5. The primary-to-secondary isolation is provided by using parts/materials (opto/transformer insulation) with the correct level of isolation and creepage distances (opto slot/transformer bobbin). Also the CY1 value (while allowing common mode noise current path) has to keep the leakage current below the standard (IEC950) accepted value. The 14Vdc monitoring light emitting diode (LED1) and 6.8k R12 are optional, and have been included in this circuit for troubleshooting convenience. EPR-00010 Page 5 of 24
Engineering Prototype Report
5.0 Layout
TP2 (U1-S) TP1 (U1-D)
Fig.5.1. Board size: L90mm x W37mm x H28mm Test points TP2 (U1 SOURCE) and TP1 (U1 DRAIN) are provided for ease of monitoring Vds. TP1 jumper can be replaced with a longer one to allow a current probe insertion for Id monitoring. For the drain-to-source voltage waveforms, connect the high voltage probe tip to TP1 and the probe ground to test point TP2. For switching current waveforms, replace jumper TP1 with a wire loop and use a Tektronix A6302 current probe and AM503 current probe amplifier (with TM501 power module) or equivalent.
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Engineering Prototype Report
6.0 Bill of Materials
Item 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 Qty. 1 1 1 1 3 1 1 1 4 Ref. CX1 CY1 C1 C2 C3 C7 C8 C4 C5 C6 D1 D2 D3 D4 D5 D6 D7 F1 J1 J2 LED1 L1 L2 Q1 RT1 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 T1 U1 U2 U3 VR1 HS1 Description 0.1uF/X2, (250VAC) 2.2nF/Y1 (125/250VAC) 33uF/450V 47uF/10V 0.1uF/50V 0.1uF/50V 0.1uF/50V 560uF/35V 220uF/35V 4.7uF/35V 1A, 1000V Part number F1772-410-2000 440LD22 EEU-EB2W330S ECE-A1-AV470 RPE121Z5U104M50V ECA-1VFQ561 ECE-A1VGE221 ECE-A1VU 4R7 1N4007 1N4007 1N4007 1N4007 UF1005 BAV20 UF5402(UF3003) 19372K, 3.15A 26-48-1035 LG3369 SU10V-03100 622LY-3R3M 2N3904 ERT-D2FHL462S Manufacturer Vishay Cera-mite Panasonic Panasonic SU Murata Panasonic Panasonic Panasonic SU Generic
1 1 1 1 2 1 1 1 1 1 1 1 1 2 1 1 1 2
1A, 600V, 75nsec 0.5W,200V, 4nsec 3A, 200V, 50nsec 3.15A/250V Header (0.156" spacing, 3pos.) GRN, low current 10mH/0.3A 3.3uH, 2.65A Switching, 200MHz (NPN, TO92) THERMISTOR (NTC)* 1M, 1/4W 910k 1/4W 6.8, 1/8W 1, 1%, 1/2W 47, 1/8W 470, 1/8W 4.7 1/8W 11.5k, 1%, 1/4W
Vishay Vishay Generic (Vishay) Wickman Molex Siemens Tokin Toko Panasonic
1 47.5k, 1%, 1/4W 1 6.8k, 1/4W 1 EF20, 917uH, 3 windings 1 TOPSwitch-FX 1 Optocoupler 1 Adjustable Shunt Regulator, TO-92 1 150V, Tranzorb 1 Heat sink, TO-220, Vertical 1 Screw, No.3x8mm Pan Phil 1 Split Lock Washer, No.3 1 Hex Nut, No.3 *Attaches to the battery (not part of the power supply).
Transformer,custom TOP233Y PC817A TL431CLP P6KE150 S704 H743-ND H772-ND H762-ND
Cooper Power Integrations Sharp Generic GI/Vishay IERC/Digikey Digikey Digikey Digikey
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Engineering Prototype Report
7.0 Transformer
7.1 Transformer drawing T1 schematic
1 10 13T #28AWG T.I x 2 9 2 4 16T #30AWG x 2 5
73T #30AWG
Electrical Specifications:
Electrical Strength Primary Inductance Resonant Frequency Primary Leakage Inductance Pin Side 60Hz 1minute, from Pins 1-5 to Pins 6-10 Between pins 1, 2, all other open, @100kHz Between pins 1, 2, all other open. Between pins 1, 2, all other shorted, @100kHz 3000 Vac 917uH +/- 10% .7 MHz (Min.) <15uH
Transformer Diagram
9 10X
Secondary
Tape
5 4
Bias
1
Primary
2
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Engineering Prototype Report Transformer Construction:
Double Primary Layer Bias Winding Reinforced Insulation +14V Winding Outer Insulation Core Preparation Final Assembly Start at Pin 2. Wind 40 turns of item [3] from left to right. Wind in a single layer. Wind remaining 33 turns (73 total) in the next layer from right to left. Finish on Pin 1. Start at Pin 4. Wind 16 turns Parallel Bifilar of item [3] from left to right. Wind uniformly, in a single layer, across entire width of bobbin. Finish on Pin 5. 1 Layer of tape [5] for insulation. Start at Pin 10. Wind 13 turns Parallel Bifilar of item [4] from left to right. Wind uniformly, in a single layer, across entire width of bobbin. Finish on Pin 9. 3 Layers of tape [5] for insulation. Wrap bottom of E core [1] with 2 layers of tape [6] as shown. Assemble and secure core halves. Impregnate uniformly [7]. Core [1] Tape [6]
Materials
Item [1] [2] [3] [4] [5] [6] [7] Description Core: EPCOS (Siemens) E 20/10/6,B66311-G-X167, or equivalent. . Gapped ALG of 171 nH/T Bobbin: EPCOS (Siemens) B66206-J1110-T1, or equivalent. Magnet Wire: #30AWG Heavy Nyleze. Triple Insulated Wire: # 28 AWG . Tape: 3M 1298 Polyester Film (white) 12.2mm wide by 2.2 mils thick. Tape: 3M 1298 Polyester Film (white) 15.7mm wide by 2.2 mils thick. Varnish.
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Engineering Prototype Report 7.2 Transformer spreadsheet Application Variables
VACMIN VACMAX FL FS VO PO N Z VB TC CIN 85 300 50 124000 15.00 15.00 85.0 0.49 19.00 3 33.0 TOP233 90.00 0.66 1.00 0.93 0.93 1.07 10.0 15.00 1.0 1.0 Volts Volts Hertz Hertz Volts Watts % Volts mSeconds uFarads Minimum AC Input Voltage Maximum AC Input Voltage AC Main Frequency Device switching Frequency Main Output Voltage Total Output Power Efficiency Estimate Loss Allocation Factor Bias Voltage Bridge Rectifier Conduction Time Estimate Input Filter Capacitor Device Name Reflected Output Voltage Ripple to Peak Current Ratio External Current Limit Ratio Device Current Limit, External Minimum Device Current Limit, Minimum Device Current Limit, Maximum Device On-State Drain to Source Voltage Output Voltage Output Winding Diode Forward Voltage Drop Bias Winding Diode Forward Voltage Drop
Device Variables
Device VOR KRPKDP KI ILIMITEXT ILIMITMIN ILIMITMAX VDS VO1 VD1 VDB Volts
Amps Amps Amps Volts Volts Volts Volts
Transformer Core/ Construction Variables
Core/Bobbin AE LE AL BW M L NS EF20 0.32 4.63 1350 12.50 0.0 2.0 13 83 424 0.55 0.21 0.57 0.38 0.30 cm^2 cm nH/T^2 mm mm Core and Bobbin Type Core Effective Cross Section Area Core Effective Path Length Ungapped Core Effective Inductance Bobbin Physical Winding Width Safety Margin Width Number of Primary Layers Number of Main Turns Minimum DC Input Voltage Maximum DC Input Voltage Maximum Duty Cycle Average Primary Current Peak Primary Current Primary Ripple Current Primary RMS Current
DC Input Voltage Parameters
VMIN VMAX DMAX IAVG IP IR IRMS Volts Volts
Current Waveform Shape Parameters
Amps Amps Amps Amps
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Engineering Prototype Report Transformer Primary Design Parameters
LP NP NB ALG BM BP BAC UR LG BWE OD INS DIA AWG CM CMA 905 73 16.25 169 2216 4137 731 1554 0.21 25.0 0.34 0.06 0.29 30 102 343 uHenries Primary Inductance Primary Winding Number of Turns Bias Winding Number of Turns Gapped Core Effective Inductance Maximum Operating Flux Density Peak Flux Density (Bp < 4200) AC Flux Density for Core Curves Relative Permeability of Ungapped Core Gap Length (Lg > 0.051 for TOP22X, Lg > 0.1 for TOP23X) Effective Bobbin Width Maximum Primary Diameter including Insulation Estimated Total Insulation Thickness Bare Conductor Diameter Primary Wire Gauge (Rounded to next smaller standard AWG value) Bare Conductor Effective Area in Circular Mils Primary Winding Current Capacity (200 < CMA < 500)
nH/T^2 Gauss Gauss Gauss mm mm mm mm mm AWG Cmils Cmils/A
Transformer Secondary Design Parameters
ISP1 ISRMS1 IO1 IRIPPLE1 CMS1 AWGS1 DIAS1 ODS1 INSS1 NS1 3.22 1.51 1.000 1.13 516 22 0.65 0.72 0.07 13.00 633 90 113 Amps Amps Amps Amps Cmils AWG mm mm mm Peak Secondary Current Secondary RMS Current Power Supply Output Current Output Capacitor RMS Ripple Current Secondary Bare Conductor Minimum Circular Mils Secondary Wire Gauge (Rounded to next smaller standard AWG value) Secondary Minimum Bare Conductor Diameter Secondary Maximum Insulated Wire Outside Diameter Maximum Secondary Insulation Wall Thickness Secondary Number of Turns Maximum Drain Voltage Estimate (Includes Effect of Leakage Inductance) Output Rectifier Maximum Peak Inverse Voltage Bias Rectifier Maximum Peak Inverse Voltage
Voltage Stress Parameters
VDRAIN PIVS1 PIVB Volts Volts Volts
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Engineering Prototype Report
8.0 Performance Data
TEST EQUIPMENT VOLTECH (PM100) AC POWER ANALYSER. Power Line Meter (EPD Inc.) OUTPUT: KIKUSUI (PLZ153W) ELECTRONIC LOAD. INPUT:
8.1 Efficiency
100.0 90.0 80.0 70.0 Efficiency(%) 60.0 50.0 40.0 30.0 20.0 10.0 0.0 0 1 2 3 4 5 6 7 8 9 10 Output Pow er(W) 11 12 13 14 15 16 85Vac, 60Hz 265Vac, 60Hz
Standby power consumption: 340mW @ 85Vac 390mW @ 265Vac Measured with Power Line Meter (EPD Inc.)
Figure 8.1.1. Efficiency vs output power at 25C, 60Hz.
100.0 90.0 80.0 70.0 Efficiency(%) 60.0 50.0 40.0 30.0 20.0 10.0 0.0 85 105 125 145 165 185 205 225 245 265 285 305 In p u t V o ltag e(V ac, 60H z)
P out=15W
Figure 8.1.2. Efficiency vs input voltage at 25C, 60Hz.
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Engineering Prototype Report
8.2 Regulation
101.0
Vout/Vout nom X100
100.5
Iout=1.07A
100.0
99.5
99.0 85 105 125 145 165 185 205 225 245 265 285 305 Line Voltage, Vin(Vac, 60Hz)
Figure 8.2.1 Regulation vs input voltage at full load @ 25C ambient.
105.0 104.0 103.0 Vout/Vout nomX100 102.0 101.0 100.0 99.0 98.0 97.0 96.0 95.0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Load, Pout(W)
85Vac, 60Hz 265Vac, 60Hz
Figure 8.2.2 Regulation vs load @ 25C ambient.
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Engineering Prototype Report
8.3 Vout vs Iout
16 14 12
85Vac, 60Hz
Vout(Vdc) 10 8 6 4 2 0
0.00 0.50 1.00
265Vac, 60Hz
1.50
2.00
2.50
Iout(A)
Figure 8.3.1 Vout vs Iout
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Engineering Prototype Report 8.4 Temperature
TO P 2 3 3 Y 110 Component Temperature 100 90 80 70 60 50 40 45 50 55 60 65 A m b i e n t T e m p e ra tu re (C ) 70
Output Cap (C4)
60
Figure 8.4.1. Maximum component temperature at 85Vac,full load.
1 4 .7 1 4 .6 1 4 .5 1 4 .4 1 4 .3 1 4 .2 1 4 .1 Vout(Vdc) 1 4 .0 1 3 .9 1 3 .8 1 3 .7 1 3 .6 1 3 .5 1 3 .4 1 3 .3 1 3 .2 1 3 .1 1 3 .0 -1 0 -5 0 5 10 15 20 25 30 35 40 45 50 55 T e m p (C )
High limit Measured value Calculated value Low limit
Figure 8.4.2. Power Supply Vout vs Battery Temperature (TR1 installed).
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Engineering Prototype Report
Transformer Winding, 60C
Output Diode, 76C. Figure 8.4.3 Infrared Scan at room temperature. Output side view. Transformer Winding, 60C.
Output Shunt Resistors, 66C. Figure 8.4.4 Infrared Scan at room temperature. Input side view. Output Shunt Resistors, 64C.
TOP233Y, 60C. Figure 8.4.4 Infrared Scan at room temperature. Lateral view.
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Engineering Prototype Report 8.5 Waveforms
1usec/div 1usec/div
.2A/div .2A/div
100V/div 100V/div
Figure 8.5.1 Drain current and drain-to-source voltage 85Vac, full load.
Figure 8.5.2 Drain current and drain-to-source voltage 85Vac, short.
1usec/div
1usec/div
.2A/div
.2A/div
100V/div
100V/div
Figure 8.5.3 Drain current and drain-to-source voltage 265Vac, full load
Figure 8.5.4 Drain current and drain-to-source voltage 265Vac, short.
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Engineering Prototype Report
1usec/div
2msec/div
200mV/div .2A/div
100V/div
Figure 8.5.5 Drain current and drain-to-source voltage 300Vac full load.
Figure 8.5.6 Output voltage ripple at 85VAC, full load, Line frequency 60Hz.
2usec/div
2usec/div
50mV/div 50mV/div
.2A/div Figure 8.5.7 Drain current and drain-to-source voltage 300Vac, max.power Figure 8.5.7 Output voltage ripple at 85Vac, full load Switching frequency 132kHz, High DC bus voltage.
.2A/div
Figure 8.5.8 Output voltage ripple at 85Vac, full load Switching frequency 132kHz, Low DC bus voltage.
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Engineering Prototype Report
8.6 Transient response
5msec/div 5msec/div
0.5V/div 500mV/div
0.5A/div
Figure 8.6.1 Transient response, Vin=85Vac, 50-75% load change
EPR-00010
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Engineering Prototype Report
8.7 Conducted EMI Scans
The attached plots show worst-case EMI performance for EP10 as compared to CISPR22B conducted emissions limits. For EMI and safety techniques refer to PI application note AN15 (Figure 6 shows a typical test set up).
Figure 8.7.1. Quasi-peak and average scans at 230Vac, L , full load, output floating.
Figure 8.7.2. Quasi-peak and average scans at 230Vac, N , full load, output floating.
EPR-00010
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Engineering Prototype Report 8.8 Surge Voltage 8.8.1 Differential = line-to-line (L-N), 2 ohm source impedance. The unit exceeded the 1kV IEC/UL 1000-4-5 Class 3 requirement (meets Class 4, 2kV). The CX1 capacitor failed after more than 20 2.5kV surges. During the 2.5kV surge, the unit turns off for approximately 1.8 seconds.
100V/div, 500msec/div DC voltage level at 230Vac, 60 Hz.
ON
OFF Power Supply State
ON
Figure 8.8.1 C1 (DC bus) voltage after the 2.5kV surge. 8.8.2 Common mode = line-to-ground (L-GND, N-GND), 12 ohm source impedance The unit exceeded the IEC/UL 1000-4-5 Class 3, 2kV and Class 4, 4kV requirements. The maximum test voltage was 6kV. During the 6kV surges, the unit continues to operate. The unit was centered on the insulation side of a 6 in x 4 in single sided copper clad board (1/16 in insulation), to avoid surface or insulation breakdown during the voltage surges. The voltage was applied between the input terminals of the unit (L or N) and the copper clad ground plane (GND), in the following sequence: L(+6kV) to GND , 5 times L(-6kV) to GND , 5 times N(+6kV) to GND , 5 times N(-6kV) to GND , 5 times
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Engineering Prototype Report
Revisions
Author
S.L..
Date
7.31.00 8.22.00 8.29.00 8.31.00 10.26.00 11.14.00 01.31.01
Rev
1 2 3 4 5 6 7
Description
First Draft Second Draft Third Draft Fourth Draft Release Changed title from EP10A to EP10 Changed from EPR-10 to EPR-00010
EPR-00010
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Engineering Prototype Report Notes
EPR-00010
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Engineering Prototype Report
For the latest updates, visit our website: www.powerint.com Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein, nor does it convey any license under its patent rights or the rights of others. PI Logo and TOPSwitch are registered trademarks of Power Integrations, Inc. (c)Copyright 2001, Power Integrations, Inc.
WORLD HEADQUARTERS NORTH AMERICA - WEST Power Integrations, Inc. 5245 Hellyer Avenue San Jose, CA 95138 USA. Main: +1*408*414*9200 Customer Service: Phone: +1*408*414*9665 Fax: +1*408*414*9765 NORTH AMERICA - EAST & SOUTH AMERICA Power Integrations, Inc. Eastern Area Sales Office 1343 Canton Road, Suite C1 Marietta, GA 30066 USA Phone: +1*770*424*5152 Fax: +1*770*424*6567 EUROPE & AFRICA Power Integrations (Europe) Ltd. Centennial Court Easthampstead Road Bracknell Berkshire, RG12 1YQ United Kingdom Phone: +44*1344*462*301 Fax: +44*1344*311*732 JAPAN Power Integrations, K.K. Keihin-Tatemono 1st Bldg. Shin-Yokohama 2-12-20 Kohoku-ku, Yokohama-shi, Kanagawa Japan 222-0033 Phone: +81*45*471*1021 Fax: +81*45*471*3717 TAIWAN Power Integrations International Holdings, Inc. 2F, #508 Chung-Hsiao E. Road Sec. 5, Taipei 105, Taiwan Phone: +886*2*2727*1221 Fax: +886*2*2727*1223
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EPR-00010
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